AMD Epyc 7552
The AMD Epyc 7552 operates with 48 cores and 96 CPU threads. It run at 3.30 GHz base 2.50 GHz all cores while the TDP is set at 200 W.The processor is attached to the SP3 CPU socket. This version includes 192.00 MB of L3 cache on one chip, supports 8 memory channels to support DDR4-3200 RAM and features 4.0 PCIe Gen 128 lanes. Tjunction keeps below -- degrees C. In particular, Rome (Zen 2) Architecture is enhanced with 7 nm technology and supports AMD-V, SVM. The product was launched on Q3/2019
| Frequency | 2.20 GHz |
| CPU Cores | 48 |
| CPU Threads | 96 |
| Turbo (1 Core) | 3.30 GHz |
| Turbo (48 Cores): | 2.50 GHz |
| Hyperthreading | Yes  |
| Overclocking | No  |
| Core Architecture | normal |
Memory & PCIe
| Memory type | DDR4-3200 |
| Max memory | |
| Memory channels | 8 |
| ECC | Yes |
| Bandwidth | -- |
| PCIe | 4.0 x 128 |
Encryption
| AES-NI | Yes |
Internal Graphics
| Memory type | DDR4-3200 |
| GPU name | no iGPU |
| GPU frequency | |
| GPU (Turbo) | No turbo |
| Generation | |
| DirectX Version | |
| Execution units | |
| Shader | |
| Max memory | -- |
| Max. displays | |
| Technology | 7 nm |
| Release date |
Technical details
| Instruction set (ISA) | x86-64 (64 bit) |
| Architecture | Rome (Zen 2) |
| L2-Cache | -- |
| L3-Cache | 192.00 MB |
| Technology | 7 nm |
| Release date | Q3/2019 |
| Socket | SP3 |
Thermal Management
| TDP (PL1) | 200 W |
| TDP (PL2) | -- |
| TDP Up | -- |
| TDP Down | -- |
| Tjunction max | -- |
Cinebench R20 (Single-Core)
Cinebench R20 is the successor of Cinebench R15 and is also based on the Cinema 4 Suite. Cinema 4 is a worldwide used software to create 3D forms. The single-core test only uses one CPU core, the amount of cores or hyperthreading ability doesn't count.
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